Prescience Lab

Evanston, IL

September 2023 - Present

June 2022 - September 2022

• Systems research into unifying software and hardware for performant parallelism.
• Investigate usage of software time-travel debugging techniques to improve hardware design workflows.
• Modify RISC-V designs to enable faster trap dispatching without changing privilege levels.
• Implement accelerators on RISC-V for high-level data-parallel languages in Chisel and Chipyard.
• Use deep understanding of RISC-V ISA to collaborate with other labs, helping facilitate their research.

HExSA Lab

Chicago, IL

June 2021 - August 2021

• Created FPGA design to accelerate virtual machine clean-up, branching off of work another Ph. D student completed.
• Developed Linux PCIe kernel module to initialize and communicate with flashed hardware design.
• Exposed FPGA capabilities as character device for programmer interaction.
• Wrote QEMU device to emulate physical device's behavior and validate kernel module functionality.